ICEPT 2021高峰论坛议程【第22届电子封装技术国际会议】

  以下是高峰论坛议程安排：

Mr. Tonglong Zhang has more than 20 years’ experience in IC packaging development. He worked in a top design house for 10 years and two OSATs for a total of 10 years. In addition, he worked in Huawei for more than 4 years. He built up Cu pillar flip chip capability from zero to HVM within 1.0 years. He developed various new package technologies. He is also experienced in IC package design, FEA stress and thermal analysis. He has 11 US patents and more than 10 Chinese patents.

Mr. Yaojian Lin received a Bachelor's degree in Metal Materials and Heat Treatment, from Department of Mechanical Engineering of Central China University of Technology, a Master's degree in Composites, from Department of Materials of Shanghai Jiaotong University, and a Master's degree in Materials Science from University of Rochester. He has worked at Shanghai Jiaotong University (Composite Institute), Lucent (Bell Labs / Sy Chipp) and STATS ChipPAC (Headquarters Research and Development in Singapore). He has 26 years of R&D and technology transfer to engineering production experience. He currently serves as Vice President, R&D at JCET Group Headquarter, and General Manager of China R&D Center. He has nearly 20 years of experience in the development and engineering of wafer-level packages (IPD, RDL, Bumping, Fanout/eWLB and MEoL), high-density SiP and FO-MCM fcBGA. He has been granted more than 200 U.S. and Chinese patents in advanced packaging.

Dr. John H Lau, with more than 40 years of R&D and manufacturing experience in semiconductor packaging and SMT assembly, John has published more than 500 peer-reviewed papers, 30 issued and pending US patents, and 21 textbooks on, e.g., Reliability of RoHS compliant 2D & 3D IC Interconnects (McGraw-Hill, 2011), Through-Silicon Via (TSV) for 3D Integration (McGraw-Hill, 2013), 3D IC Integration and Packaging (McGraw-Hill, 2016), Fan-Out Wafer-Level Packaging (Springer, 2018), Heterogeneous Integrations (Springer 2019). Assembly and Reliability of Lead-Free Solder Joints (Springer 2020), and Semiconductor Advanced Packaging (Springer, 2021). John is an elected IEEE fellow, IMAPS Fellow, and ASME Fellow.

Prof. Sheng Liu is the dean of the School of Power and Mechanical Engineering and the Institute of Technological Science of Wuhan University. He is the National Science Fund for Distinguished Young Scholars (Type B), Yangtze River Scholar Distinguished Professor, ASME Fellow, IEEE Fellow, and as a professionalism in the area of the “863 program” of the National High Technology Research and Development Program. He has acquired his doctor degree in Stanford University in 1992. From 1992 to 1995, he held the title of lecturer at Florida institute of technology. He was authorized as a tenure from 1995 to 2001 in the Department of Mechanical Engineering and manufacturing research at Wayne State University. During the period of his title job, he was granted the President’s prize of USA. The research of IC and MEMS packaging with the research of CAD allowed him to obtain the Young Investigator Award in Natural Sciences of the United States of America. In 2001, Liu Sheng resigned from the Department of Mechanical Engineering and Manufacturing research at Wayne State University and returned to China, where he took the lead of carrying out research focusing on the theory of Reliable Engineering Development for LED electronic packaging.

Dr. Peng Sun, COO&SVP of Wuhan Xinxin Semiconductor manufacturing Co(XMC). He obtained PH.D from Microelectronics and Solid-state Electronics Department of Fudan University, and has more than 20 years’ experience in semiconductor technology R&D and operation management.

Peng Sun has been in charge of the process and product R&D in DRAM, SOC, Flash, PMIC, RF and CIS technology, he is now leading the novel 3D IC technology development in XMC.

Prof. Johan Liu graduated with a master and a Ph.D. degree in materials science from the Royal Institute of Technology, Sweden. Before joining Chalmers University of Technology, he served in various positions at the Swedish Institute for Production Engineering Research (IVF) as project manager, group leader and division manager. He is currently a full professor in electronics production and head of Electronics Materials and Systems Laboratory, Department of Microtechnology and Nanoscience in Chalmers University of Technology, Sweden and a visiting professor in Shanghai University, China. In addition, he serves as the chairman of the IEEE EPS Nordic chapter, vice president of the IMAPS Nordic chapter, conference co-chair of 2021 IMAPS European Microelectronic Packaging Conference (EMPC) as well as chairman of the IEEE ESTC Conference materials and processes committee since 2016. As a member of the Royal Swedish Academy of Engineering Sciences and a fellow of IEEE, he has published 550 papers in journals, conference proceedings and book chapters with a Hirsch index of 46 and with a citation of over 8700 times. He has 90 patents accepted or filed and has given over 70 keynote/invited talks. In addition to this, he has published 50 papers with impact factor over 3,5 (15 of them over 10) including those in Nature Communications, Advanced Materials, Advanced Functional Materials, Nanoenergy, Small, Carbon, Journal of Materials Chemistry,  Biomicrofludics, Tissue Engineering, Glia, Langmuir, Scientific Reports, IEEE Electron Device Letters and IEEE CPMT Transactions, Applied Physics Letters, Nanotechnology, IEEE Nanotechnology, Journal of Composite Science and Technology, Scientific Reports and European Polymer Journal etc. He has also received many awards including IEEE Exceptional Technical Achievement Award, IEEE CPMT Transaction Best paper award in “Advanced Packaging”. His research field covers mainly nanoelectronics, microsystems packaging and 3D additive manufacturing materials and processes including CNT and graphene based thermal interface materials, vertical stacking CNT TSV technology, graphene heat spreader, thermal interface material, conductive adhesives, nano-soldering and nanoscaffolds for biomedical applications.

Prof. Qidong Wang received his B.S. degree in Electronics Engineering from Southeast University in Nanjing, and Ph.D degree in Microelectronics and Solid-State Electronics from University of Chinese Academy of Sciences, and worked in Varian Lab, Stanford University as a Visiting Scholar. He currently serves as the Director of Packaging and Integration R&D Center in the Institute of Microelectronics of the Chinese Academy of Sciences. He has been the Principle Investigator in multiple National Science and Technology Major Programs, and he is the author of more than 60 internationally referred journal and conference papers, and 36 filed patents. His research interests include Heterogeneous Integration, Antenna-in-Package, 2.5D/3D integration, and Advanced Substrate.

Prof. Katsuaki Suganuma received the degree of Dr. Engineer from Tohoku University in 1982. He became a research assistant of ISIR (Institute of Scientific and Industrial Research), Osaka University in 1982, an associate professor of National Defense Academy in 1986, and a professor of ISIR of Osaka University in 1996. He was the director of Nanotechnology Center of ISIR in 2007-2009, the director of ISIR in 2018-2020. He is currently Specially Appointed Professor and Professor Emeritus of Osaka University, Executive Advisor of Daicel Corp. and Managing Director of Izumi Science and Technology Foundation. He has worked on lead-free soldering, conductive adhesive, power electronics packaging and printed electronics. He published about 430 journal papers, 160 reviews and many books on packaging technology such as “Wide Bandgap Power Semiconductor Packaging” in English. He received several awards such as Fularth Pacific Award (1995), Minister Prize of Economic, Trade and Industry (2012), and The Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology (2021). He has carried out several national projects on packaging technology, and is currently in charge of IEC SC47D Semiconductor Packaging Japan committee (JEITA), Weak-Micro-Via Task Force for Advanced Semiconductor Substrate (JEITA), Standardization of Thermal Property Evaluation of WBG Power Devices/JFCA, and of the WGB system integration consortium.

Dr. Daquan Yu is a Distinguished Professor of Xiamen University and the CEO of Xiamen Sky Semiconductor Co., Ltd. He was the President of Research Academy of Advanced Packaging Technology of TSHT Group from 2014 to 2019. Before that, he was a professor of Institute of Microelectronics, Chinese Academy of Sciences from 2010 to 2015. Before that, he had carried out research work at Fraunhofer IZM in Germany, and Institute of Microelectronics in Singapore from 2005 to 2010. He has authored or co-authored more than 200 peer-reviewed technical publications and holds more than 70 patents. He is a member of the Expert Committee of the 02 National Science and Technology Major Program of China, vice president of MEMS branch of China Semiconductor Industry Association, and a Senior member of IEEE.